A new contender is quietly reshaping the boundaries of semiconductor manufacturing. Lace, a Norway-based chipmaking equipment startup backed by Microsoft, has raised $40 million in fresh funding to advance a radically different approach to lithography, one that could extend the limits of Moore’s Law far beyond current expectations.
The Series A round was led by Atomico, with participation from Microsoft’s venture arm M12, Linse Capital, the Spanish Society for Technological Transformation, and Nysno. While the company declined to disclose its valuation, the strategic composition of investors signals growing conviction around next-generation fabrication technologies.
At the core of Lace’s proposition is a departure from the industry’s dependence on light-based lithography. Today, semiconductor leaders such as Taiwan Semiconductor Manufacturing Co and Intel rely on extreme ultraviolet systems primarily supplied by ASML to etch intricate circuit patterns onto silicon wafers. These systems have defined the pace of innovation, yet they are nearing physical and economic constraints.
Helium Atom Beam Introduces a New Scaling Paradigm
Lace is approaching the problem differently. Instead of photons, its engineers have developed a lithography method based on a helium atom beam, an approach that fundamentally alters the scale at which chip features can be created.
“With that, the Norwegian company will be able to create chip designs that are 10 times as small as what is currently possible,” CEO Bodil Holst told Reuters in an interview.
“Our technology is a way that can potentially expand the roadmap and be an enabler for doing things that would not have been possible otherwise,” Holst said.
The implications extend across the semiconductor value chain. Current systems operate at wavelengths around 13.5 nanometers. In contrast, Lace’s helium beam measures approximately 0.1 nanometers, approaching atomic dimensions. A human hair, by comparison, is roughly 100,000 nanometers wide.
Consequently, this leap enables a new class of transistor density. Smaller features allow more computational power within the same silicon footprint, an outcome that directly benefits AI workloads, high-performance computing, and next-generation data infrastructure.
John Petersen, Scientific Director of Lithography at Imec, underscored the magnitude of this shift: the technology could allow the industry to fabricate components “to an ‘almost unimaginable’ degree.”
Moreover, the ability to approach atomic resolution introduces new design possibilities for chip architects. It reframes performance scaling not as a constraint problem, but as a materials and tooling opportunity.
The company has already developed prototype systems and presented its findings at a scientific lithography summit earlier this year. It now plans to move toward industrial validation, targeting deployment of a test tool within a pilot fabrication facility by 2029. This timeline reflects both the complexity and the stakes. Semiconductor manufacturing transitions unfold over decades, not quarters. Yet, the urgency is intensifying as AI-driven demand reshapes compute requirements.
Furthermore, the funding underscores a broader shift in how the industry views scaling. Traditional approaches shrinking nodes through optical advancements are reaching diminishing returns. As a result, alternative pathways such as atomic-scale patterning are gaining strategic importance..
Strategic Implications for Hyperscalers and Infrastructure Control
For Microsoft, the investment also signals a forward-looking bet on infrastructure. As hyperscalers compete to secure long-term compute advantage, control over foundational technologies, chips, fabrication methods, and supply chains becomes critical.
If successful, it could unlock “ultimately atomic resolution,” as Holst described, redefining how chips are designed, manufactured, and scaled. In that scenario, the competitive landscape would not just shift, it would reset.
Still, execution remains the defining challenge. Bridging the gap between prototype innovation and fab-scale deployment will require sustained capital, ecosystem alignment, and engineering breakthroughs.
